Increasing data transmission rate in an inter-integrated circuit (‘I²C’) system

摘要

Increasing data transmission rate in an I2C system that includes an I2C source device and an destination device, the source device coupled to the destination device through an SDL and SCL, including: receiving in parallel, by the destination device, an SDL data signal and an SCL data signal, the SCL data signal encoded with bits; and, for each bit of the SCL data signal: detecting rise time of the bit and determining, in dependence upon the detected rise time, whether the bit represents a first binary value or a second binary value including: determining that the bit represents a first binary value when the detected rise time is less than a predefined threshold; and determining that the bit represents a second binary value when the detected rise time is not less than the predefined threshold.

主权项

1. A method of increasing data transmission rate in an Inter-Integrated Circuit (‘I2C’) system, the I2C system comprising an I2C source device and an I2C destination device, the I2C source device coupled to the I2C destination device through a Serial Data Line (‘SDL’) and a Serial Clock Line (‘SCL’), the method comprising:
receiving in parallel, by the I2C destination device from the I2C source device, an SDL data signal on the SDL and an SCL data signal on the SCL, the SCL data signal encoded with a plurality of bits, each bit encoded with voltage alternating between a logic low voltage and a logic high voltage; and for each bit of the SCL data signal: detecting, by the I2C destination device, rise time of the bit; and determining, in dependence upon the detected rise time, whether the bit represents a first binary value or a second binary value including:
determining that the bit represents a first binary value when the detected rise time is less than a predefined threshold; anddetermining that the bit represents a second binary value when the detected rise time is not less than the predefined threshold.