| 摘要 |
In some embodiments, a field effect transistor (FET) structure includes a body structure, a dielectric structure, a gate structure, and a source or drain region. The gate structure formed on the body structure. The source or drain region is embedded in the body structure, is adjacent to the dielectric structure, and extended over the dielectric structure. The source or drain region includes a stressor material having a lattice constant different from a lattice constant of the body structure. The source or drain region includes a first area formed on a first level on an upper part of a dielectric structure, and a second area formed under the first level, and including a downward tempered region adjacent to the corresponding dielectric structure. |
