WRITE LEVELING CONTROL CIRCUIT FOR TARGET MODULE AND THEREOF METHOD

摘要

Disclosed is a method for controlling write leveling in a memory system. The method for controlling write leveling comprises the steps of: registering to a leveling reference table data-related signal reference delay values for each type of memory modules to be mounted on a target board; transmitting write leveling-related signals to a preset type of a memory module when the memory module is mounted on the target board; detecting a timing skew between data-related signals received respectively from memory elements within the memory module and clock signals; and when the timing skew deviates out of a predetermined acceptable range from a corresponding reference delay value among the data-related signal reference delay values registered to the leveling reference table, adjusting a delay of the data-related signal to be transmitted to the corresponding memory element based on the corresponding reference delay value.