发明名称 MEMORY CONTROLLER, INFORMATION PROCESSING DEVICE AND REFERENCE VOLTAGE ADJUSTMENT METHOD
摘要 PROBLEM TO BE SOLVED: To adjust reference voltage of a DQ input buffer.SOLUTION: A memory controller includes a first input buffer for determining a received data signal on the basis of reference voltage, a second input buffer for inputting a received data strobe signal, a data latch circuit for acquiring a data signal outputted by the first input buffer on the basis of phases of a rising edge and a falling edge of an internal data strobe signal outputted by the second input buffer, a duty ratio detection circuit for detecting a duty ratio of the internal data strobe signal, and a reference voltage generation circuit for adjusting reference voltage on the basis of the duty ratio detected by the duty ratio detection circuit.
申请公布号 JP2015138537(A) 申请公布日期 2015.07.30
申请号 JP20140011872 申请日期 2014.01.24
申请人 FUJITSU LTD 发明人 HASHIMOTO MICHITAKA
分类号 G06F12/00;G11C11/4074;G11C11/4093;H03K5/05 主分类号 G06F12/00
代理机构 代理人
主权项
地址
您可能感兴趣的专利