| 发明名称 |
INTERFACING WITH A BUFFER MANAGER VIA QUEUES |
| 摘要 |
Embodiments include a system on chip (SOC) comprising: a cache; a buffer manager configured to manage a plurality of buffer locations; and a processing core configured to issue a buffer allocation request to the buffer manager to request the buffer manager to allocate one or more buffer locations to the processing core, the buffer manager being further configured to, in response to receiving the buffer allocation request, allocate a first buffer location to the processing core by writing a first buffer pointer associated with the first buffer location to the cache, and the processing core being further configured to obtain the allocation of the first buffer location by reading the first buffer pointer from the cache. |
| 申请公布号 |
US2015212795(A1) |
申请公布日期 |
2015.07.30 |
| 申请号 |
US201514606268 |
申请日期 |
2015.01.27 |
| 申请人 |
Marvell Israel (M.I.S.L) Ltd. |
发明人 |
Ilan Dan;Rachmani Alon;Weiner Michael |
| 分类号 |
G06F5/14;G06F12/08 |
主分类号 |
G06F5/14 |
| 代理机构 |
|
代理人 |
|
| 主权项 |
1. A system on chip (SOC) comprising:
a cache; a buffer manager configured to manage a plurality of buffer locations; and a processing core configured to issue a buffer allocation request to the buffer manager to request the buffer manager to allocate one or more buffer locations to the processing core, the buffer manager being further configured to, in response to receiving the buffer allocation request, allocate a first buffer location to the processing core by writing a first buffer pointer associated with the first buffer location to the cache, and the processing core being further configured to obtain the allocation of the first buffer location by reading the first buffer pointer from the cache. |
| 地址 |
Yokneam IL |
