| 摘要 |
An array substrate comprises: a plurality of sub-pixel arrays arranged in the form of a matrix; the sub-pixel array comprises a first sub-pixel (21), a second sub-pixel (22), a third sub-pixel (23), a first gate line (G1) for controlling the first sub-pixel (21), a second gate line (G2) for controlling the second sub-pixel (22), a third gate line (G3) for controlling the third sub-pixel (23), a first data line (S1) and a second data line (S2); the first sub-pixel (21) is located between the first gate line (G1) and the second gate line (G2); the second sub-pixel (22) and the third sub-pixel (23) are located between the second gate line (G2) and the third gate line (G3); the first sub-pixel (21), the second sub-pixel (22) and the third sub-pixel (23) are located between the adjacent first (S1) and second data lines (S2); the first sub-pixel (21) and the second sub-pixel (22) share the first data line (S1), or the first sub-pixel (21) and the third sub-pixel (23) share the second data line (S2). |
