发明名称 SCHEDULER MECHANISM, OPERATING SYSTEM, AND MULTI-PROCESSOR SYSTEM
摘要 PROBLEM TO BE SOLVED: To appropriately allocate tasks to either a high-performance processor or a low-power processor, in a multi-processor system involving both high-performance processors and low-power processors, even if some of the tasks are to be commonly used in common by multiple applications.SOLUTION: Applications are so configured as to include a plurality of tasks that are either driven by inputs or sequentially driven by other tasks. A task scheduler mechanism is equipped with a synchronizing mechanism that causes a driven task to succeed a level of priority matching the input, such as an interrupt, or the task of the synchronization source and a task allocating mechanism that determines, on the basis of the succeeded level of priority, whether to allocate the driven task to the high-performance processor or the low-power processor.
申请公布号 JP2015138323(A) 申请公布日期 2015.07.30
申请号 JP20140008579 申请日期 2014.01.21
申请人 RENESAS ELECTRONICS CORP 发明人 ITO YOSHIYUKI
分类号 G06F9/50 主分类号 G06F9/50
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