发明名称 PROVIDING MEMORY TRAINING OF DYNAMIC RANDOM ACCESS MEMORY (DRAM) SYSTEMS USING PORT-TO-PORT LOOPBACKS, AND RELATED METHODS, SYSTEMS, AND APPARATUSES
摘要 Providing memory training of dynamic random access memory (DRAM) systems using port-to-port loopbacks, and related methods, systems, and apparatuses are disclosed. In one aspect, a first port within a DRAM system is coupled to a second port via a loopback connection. A training signal is sent to the first port from a System-on-Chip (SoC), and passed to the second port through the loopback connection. The training signal is then returned to the SoC, where it may be examined by a closed-loop training engine of the SoC. A training result corresponding to a hardware parameter may be recorded, and the process may be repeated until an optimal result for the hardware parameter is achieved at the closed-loop training engine. By using a port-to-port loopback configuration, the DRAM system parameters regarding timing, power, and other parameters associated with the DRAM system may be trained more quickly and with lower boot memory usage.
申请公布号 US2015213849(A1) 申请公布日期 2015.07.30
申请号 US201514589145 申请日期 2015.01.05
申请人 QUALCOMM Incorporated 发明人 Srinivas Vaishnav;Brunolli Michael Joseph;Chun Dexter Tamio;West David Ian
分类号 G11C7/10 主分类号 G11C7/10
代理机构 代理人
主权项 1. A method for providing memory training for a dynamic random access memory (DRAM) system, comprising: receiving, by a first port of a DRAM system, a training signal from a System-on-Chip (SoC); providing, by the first port of the DRAM system, the training signal to a second port of the DRAM system via a loopback connection; and providing, by the second port of the DRAM system, the training signal to the SoC.
地址 San Diego CA US