发明名称 LAYOUT DESIGN SYSTEM FOR GENERATING LAYOUT DESIGN OF SEMICONDUCTOR DEVICE
摘要 The present invention provides a layout design system. The layout design system includes: a processor; a storage module storing a standard cell design; and a generation module which receives the standard cell design by using the processor and outputs a chip design including design elements. The standard cell design includes an active area and a normal gate area arranged on the active area. The design elements include an active cut design intersecting the active area. The generation module adjusts the width of the active cut design to output a chip design.
申请公布号 KR20150087615(A) 申请公布日期 2015.07.30
申请号 KR20140007788 申请日期 2014.01.22
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 KIM, JIN TAE;SEO, JAE WOO
分类号 G06F17/50 主分类号 G06F17/50
代理机构 代理人
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