发明名称 Synthesizer with lock detector and method of operation thereof
摘要 The present invention provides a synthesiser having a divide circuit implemented using only a single counter along with a decoder. This allows for a method of designing a plurality of divide circuits which each use the same single counter and each use a different decoder.
申请公布号 EP2757692(A3) 申请公布日期 2015.07.29
申请号 EP20140165271 申请日期 2001.12.17
申请人 QUALCOMM INCORPORATED 发明人 SU, DAVID, K.;YUE, CHIK, PATRICK;WEBER, DAVID, J.;ZARGARI, MASOUD
分类号 H03L7/095;H03K23/66;H03L7/089;H03L7/099;H03L7/10;H03L7/183;H03L7/193 主分类号 H03L7/095
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