Edge Termination Region for Semiconductor Device

摘要

An isolation region (14) is formed between an edge termination region (2) having deep trenches (20,34) and the central region (4) of a semiconductor field effect transistor. The isolation region includes gate fingers (18) extending from the edge gate trench regions (28) to the gate trenches (6) in the central region (4) to electrically connect the edge gate trench regions to the gate trenches (6) in the central region. The isolation region also includes isolation fingers (22,24) filled with conductive material extending from the edge termination region (2) towards the central region (4) and gate between the gate fingers (18) for reducing the breakdown voltage with a RESURF effect.