| 摘要 |
The memory locations are arranged to record a change of state on one or more of the external connections in the event that the change of state occurs while the central processing unit is in a low power state or otherwise unable to react to the change of state. The integrated circuit microprocessor or System on chip device comprises a central processing unit (CPU) and a general purpose input or output module 2 having a plurality of external connections 4. The external connections are configured by the general purpose input or output module to provide respective inputs to the device. The device further comprises respective memory locations 6 corresponding to each of the external connections. The change of state may wake up the CPU, so that the memory locations, provided by a register having one or more bits corresponding to each of the external connection pins, are read once the CPU moves to a higher power state, for example from wireless keyboard or mouse whilst CPU is waking from sleep state. |
