发明名称 半導体装置
摘要 In a phase change memory, when M bit (8 bits=1 byte) data is written, erase operation and program operation are performed in units of n bit (M>n) data. Further, when M bit data is written, program operation is performed in units of the n bit (M>n) data. Further, when M bit data is read from the memory cell, read operation is performed in units of the n bit (M>n) data. For example, when the data is written into to the phase change memory, the data is not overwritten but program is performed after once erasing the target memory cell. The data size for erasure and the data size for program are made equal. Erase and program operation are performed only for the demanded data size.
申请公布号 JP5756622(B2) 申请公布日期 2015.07.29
申请号 JP20100266343 申请日期 2010.11.30
申请人 株式会社日立製作所 发明人 三浦 誓士;半澤 悟
分类号 G11C13/00;H01L27/105 主分类号 G11C13/00
代理机构 代理人
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