发明名称 Semiconductor device and method for driving semiconductor device
摘要 A semiconductor device includes a first transistor having a p-channel type, a second transistor having an n-channel type, and a third transistor with low off-state current between a high potential power supply line and a low potential power supply line, and a source terminal and a drain terminal of the third transistor are connected so that the third transistor is connected in series with the first transistor and the second transistor between the high potential power supply line and the low potential power supply line, and the third transistor is turned off when both the first transistor and the second transistor are in conducting states.
申请公布号 US9093988(B2) 申请公布日期 2015.07.28
申请号 US201313961073 申请日期 2013.08.07
申请人 Semiconductor Energy Laboratory Co., Ltd. 发明人 Yamazaki Shunpei;Koyama Jun
分类号 H03B1/00;H03K3/012;H01L27/092;H03K3/03;H01L27/06;H01L27/12;H01L29/786 主分类号 H03B1/00
代理机构 Fish & Richardson P.C. 代理人 Fish & Richardson P.C.
主权项 1. A semiconductor device comprising: a first transistor; a second transistor; and a third transistor, wherein the first transistor and the second transistor have different conductivity types, wherein each of the first transistor and the second transistor comprises a channel formation region comprising a first semiconductor, wherein the third transistor comprises a channel formation region comprising a second semiconductor having a band gap wider than the first semiconductor, wherein a gate of the first transistor is electrically connected to a gate of the second transistor, wherein one of a source and a drain of the first transistor is electrically connected to a first power supply line, wherein the other of the source and the drain of the first transistor is electrically connected to one of a source and a drain of the second transistor, wherein the other of the source and the drain of the second transistor is electrically connected to one of a source and a drain of the third transistor, wherein the other of the source and the drain of the third transistor is electrically connected to a second power supply line, and wherein the third transistor is configured to be turned off when the first transistor is switched from an on state to an off state and the second transistor is switched from an off state to an on state or when the first transistor is switched from the off state to the on state and the second transistor is switched from the on state to the off state.
地址 Kanagawa-ken JP