Transceiver architecture with improved capacity and interference mitigation

摘要

A transceiver having substantially improved capacity and interference mitigation. The transceiver comprises a first direct conversion receiver (DCR) and a plurality of additional DCRs, each of the plurality of additional DCRs having essentially identical constituent components to the first DCR. Each DCR does a direct down-conversion from RF to a complex pair of baseband I and Q components. The complex signal pair from each DCR is digitized and further processed in a modem module where the signal is optimally filtered, demodulated, and error-corrected. The modem module reconstructs the message information contained in each signal from all of the DCR's, simultaneously providing the demodulated data that was contained in the RF signals. The dynamic range of the system is extremely large (i.e., approximately 80 dB).

主权项

1. A transceiver comprising:
a) a first direct conversion receiver (DCR) configured to receive Link 16 signals in one of several sub-bands, each of the several sub-bands having a unique frequency range, the first DCR having a minimum usable signal dynamic range of 80 dB, the first DCR comprising:
i. a frequency converter configured to frequency-convert signals received at the center frequency of the received sub-band into a zero-frequency complex signal pair composed of in-phase (I) and quadrature (Q) signal components, the frequency converter having an in-phase Local Oscillator (I-LO) input, a quadrature local oscillator (Q-LO) input, an I signal output and a Q signal output; andii. an LO having an I-LO output coupled to the I-LO input of the frequency converter and a Q-LO output coupled to the Q-LO input of the frequency converter, the LO outputting a signal at a frequency which, when applied to the LO inputs of the frequency converter, will down-convert an RF signal with a frequency at the center of the sub-band applied to the input of the frequency converter to the zero-frequency complex signal pair composed of in-phase (I) and quadrature (Q) signal components;iii. a first low noise amplifier/analog to digital converter (LNA/ADC) driver, having an input and an output, the input coupled to the I signal output of the frequency converter;iv. a second LNA/ADC driver having an input and an output, the input coupled to the Q signal output of the frequency converter;v. a first analog to digital converter (ADC) having an output and an input, the input coupled to the output of the first LNA/ADC driver, the first ADC sampling the output of the first LNA/ADC at a rate that is substantially higher than the highest frequency of interest and generating a digital stream of data provided to the output; andvi. a second ADC having an output and an input, the input coupled to the output of the second LNA/ADC driver, the second ADC sampling the output of the second LNA/ADC at a rate that is substantially higher than the highest frequency of interest and generating a digital stream of data provided to the output; b) a plurality of additional DCRs, each having essentially identical constituent components to the first DCR, and each receiving Link 16 signals in a sub-band having a unique frequency range from the frequency ranges of the sub-bands received by each other DCR; and c) a modem module having a plurality of inputs, each input coupled to the output of an associated ADC of each of the DCRs and configured to reconstruct message information modulated on each signal received from both ADCs of each DCR.