发明名称 Analog transistor
摘要 An analog transistor useful for low noise applications or for electrical circuits benefiting from tight control of threshold voltages and electrical characteristics is described. The analog transistor includes a substantially undoped channel positioned under a gate dielectric between a source and a drain with the undoped channel not being subjected to contaminating threshold voltage implants or halo implants. The channel is supported on a screen layer doped to have an average dopant density at least five times as great as the average dopant density of the substantially undoped channel which, in turn, is supported by a doped well having an average dopant density at least twice the average dopant density of the substantially undoped channel.
申请公布号 US9093469(B2) 申请公布日期 2015.07.28
申请号 US201414273938 申请日期 2014.05.09
申请人 Mie Fujitsu Semiconductor Limited 发明人 Shifren Lucian;Thompson Scott E.;Gregory Paul E.
分类号 H01L29/66;H01L21/8234;H01L29/78;H01L29/10 主分类号 H01L29/66
代理机构 Baker Botts L.L.P. 代理人 Baker Botts L.L.P.
主权项 1. A process for manufacturing an analog transistor comprising: providing a doped well; forming a screen layer that contacts and overlies at least a portion of the doped well; forming an epitaxial undoped channel layer above the screen layer, and the undoped channel not being subjected to contaminating threshold voltage implants or halo implants; forming a gate dielectric and gate electrode above the undoped channel and positioned between a source and a drain, the source and drain configured to respond to an analog signal; and maintaining process conditions so that a portion of the undoped channel adjacent to the gate dielectric remains undoped in the final analog transistor.
地址 Kuwana, Mie JP