| 主权项 |
1. A driving apparatus including:
a switching module for selecting and outputting a voltage signal according to a received clock signal; a conversion module for converting the voltage signal into a current signal and outputting the current signal; an output module for outputting the voltage signal or the converted current signal to drive a pixel circuit array; and a voltage generating module configured to generate a data voltage signal; wherein a first output terminal of the switching module is connected to an input terminal of the conversion module, a second output terminal of the switching module is connected to an input terminal of the output module, and an output terminal of the conversion module is connected to an input terminal of the output module; wherein the conversion module includes a data voltage input unit for converting the data voltage signal into a data current signal, a threshold voltage compensating unit for compensating the threshold voltage of transistor, and a data current output unit for outputting the data current signal converted; wherein the data voltage input unit includes a first transistor, a second transistor, a third transistor, a fourth transistor, and a ninth transistor; the threshold voltage compensating unit includes a fifth transistor, a sixth transistor, a seventh transistor, and an eighth transistor; and the data current output unit includes a tenth transistor, wherein a gate of the first transistor is connected to the first output terminal of the switching module; a drain of the first transistor is connected to a drain and a gate of the third transistor and a gate of the fourth transistor; a source of the first transistor is connected to a source of the sixth transistor, a gate and a drain of the ninth transistor, and a source of the tenth transistor, and is grounded; a gate and a drain of the second transistor are connected to a gate of the fifth transistor, a drain of the fourth transistor and a gate of the tenth transistor; a source of the second transistor is connected to a source of the ninth transistor, a source of the fifth transistor and a gate of the sixth transistor; a source of the third transistor is connected to a source of the fourth transistor, a source of the seventh transistor and a source of the eighth transistor and a first power supply terminal VDD; a drain of the fifth transistor is connected to a drain and a gate of the seventh transistor, and a gate of the eighth transistor; a drain of the sixth transistor is connected to a drain of the eighth transistor; and a drain of the tenth transistor is connected to the second output terminal of the switching module and the input terminal of the output module. |
