PREDICTIVE AND REACTIVE CONTROL OF SECONDARY SIDE SYNCHRONOUS RECTIFIERS IN FORWARD CONVERTERS

摘要

A forward converter has a primary side containing a PWM controller for controlling switching of a power switch and has a secondary side coupled to the primary side via a transformer. The secondary side includes a forward transistor and a catch transistor. A secondary side switch controller controls switching of the forward transistor and the catch transistor without communication from the primary side. The secondary side switch controller detects the rising and falling of the voltages at the ends of the secondary winding to control the switching of the forward and catch transistors. A delay locked loop (DLL) is provided in the secondary side switch controller that turns on the catch transistor when the power switch is turned off and turns off the catch transistor at a predetermined time before the power switch is turned on. A separate circuit controls the catch transistor during a discontinuous mode.

主权项

1. A forward converter comprising:
a primary side containing a pulse width modulation (PWM) controller for controlling switching of a power switch at a duty cycle to achieve a regulated output voltage of the converter; a transformer having a primary winding, connected to the power switch, and a secondary winding; a secondary side coupled to the primary side via the transformer, the secondary side including a forward transistor and a catch transistor; the secondary side including a secondary side switch controller that controls switching of the forward transistor and the catch transistor without communication from the primary side, the secondary side switch controller comprising:
a first circuit coupled to a first end of the secondary winding and detecting rising and falling edges of a first voltage at the first end of the secondary winding, the rising and falling edges corresponding to the turning on and turning off of the power switch, the first circuit generating a first digital signal upon a rising edge of the first voltage and generating a second digital signal upon a falling edge of the first voltage; anda second circuit receiving the first digital signal and the second digital signal, the second circuit turning on the catch transistor upon detecting the second digital signal, the second circuit turning off the catch transistor a predetermined period of time prior to detecting the first digital signal for each cycle such that the catch transistor is turned off prior to the power switch being turned on.