METHOD OF PATTERNING A METAL GATE OF SEMICONDUCTOR DEVICE

摘要

Provided are methods of patterning metal gate structures including a high-k gate dielectric. In an embodiment, a soluble hard mask layer may be used to provide a masking element to pattern a metal gate. The soluble hard mask layer may be removed from the substrate by water or a photoresist developer. In an embodiment, a hard mask including a high-k dielectric is formed. In a further embodiment, a protection layer is formed underlying a photoresist pattern. The protection layer may protect one or more layers formed on the substrate from a photoresist stripping process.

主权项

1. A method comprising:
forming a dielectric layer over a first region and a second region of a substrate; forming a first metal layer directly on the dielectric layer in the first and second regions; forming a second metal layer directly on the first metal layer in the first and second regions; forming a protection layer over the metal layer in the first and second regions; removing a first portion of the protection layer in the second region to expose the second metal layer in the second region; removing the exposed second metal layer in the second region; removing the protection layer in the first region to expose the second metal layer in the first region; and forming a third metal layer directly on the exposed second metal layer in the first region and directly on the first metal layer in the second region.