CIRCUIT AND METHOD FOR SPIN-TORQUE MRAM BIT LINE AND SOURCE LINE VOLTAGE REGULATION

摘要

Circuitry and a method for regulating voltages applied to magnetoresistive bit cells of a spin-torque magnetoresistive random access memory (ST-MRAM) reduces time-dependent dielectric breakdown stress of the word line transistors. During a read or write operation, only the ends of the selected bit cells are pulled down to a low voltage and/or pulled up to a high voltage depending on the operation (write 0, write 1, and read) being performed. The ends of the unselected bit cells are held at a precharge voltage while separately timed signals pull up or pull down the ends of the selected bit cells during read and write operations.

主权项

1. A method of operation of a magnetoresistive memory that includes a plurality of magnetic bit cells, each magnetic bit cell of the plurality of magnetic bit cells including a magnetic tunnel junction coupled in series with a select transistor, the method comprising:
pulling a first end of each magnetic bit cell of the plurality of magnetic bit cells to a precharge voltage; pulling a second end of each magnetic bit cell of the plurality of magnetic bit cells to the precharge voltage; and after pulling the first and second ends of each magnetic bit cell to the precharge voltage:
applying a first voltage at the first end of a selected magnetic bit cell of the plurality of magnetic bit cells;setting a word line to a high voltage level, where the word line is coupled to the select transistor of the selected magnetic bit cell;delaying for a delay after applying the first voltage; andafter delaying for the delay, applying a second voltage at the second end of the selected magnetic bit cell.