发明名称 METHOD OF FORMING AN INTERCONNECT STRUCTURE WITH HIGH PROCESS MARGINS
摘要 A method of forming an interconnect structure with high process margin. The present invention provides higher aligning margin for the connection of via parts and line parts. The method for forming the interconnect structure includes the steps of: forming a first mask layer with a plurality of first openings over the first insulating layer; forming a second insulating layer over the mask layer; forming a second mask layer with a plurality of second openings over the second insulating layer; performing an etching process by using the second mask layer to form a plurality of cavities penetrating through the second insulating layer, the first mask layer, and the first insulating layer; and filling the plurality of cavities with at least one conductive material.
申请公布号 US2015206836(A1) 申请公布日期 2015.07.23
申请号 US201414161500 申请日期 2014.01.22
申请人 NANYA TECHNOLOGY CORPORATION 发明人 BIAN ZAI LONG
分类号 H01L23/522;H01L21/768 主分类号 H01L23/522
代理机构 代理人
主权项 1. An interconnect structure, comprising: a substrate; a first insulating layer disposed over the substrate, wherein the first insulating layer has a plurality of via holes filled with a first conductive material; a second insulating layer disposed over the first insulating layer, wherein the second insulating layer has a plurality of trenches filled with a second conductive material; a first mask layer disposed between the first insulating layer and the second insulating layer, wherein the first mask layer has a plurality of openings connecting the plurality of via holes and the plurality of trenches; and wherein the plurality of via holes are self-aligned with the plurality of trenches.
地址 Tao-Yuan Hsien TW