| 发明名称 |
EMPHASIS SIGNAL GENERATING CIRCUIT AND METHOD FOR GENERATING EMPHASIS SIGNAL |
| 摘要 |
An emphasis signal generating circuit includes: a branch and delay unit configured to branch an input signal, delay a branched signal, and output a first delayed signal; a high-frequency extraction unit configured to extract at least one of high-frequency components of the input signal and the first delayed signal to output a high-frequency signal; and an addition and subtraction unit configured to add and subtract the input signal, the first delayed signal, and the high-frequency signal. |
| 申请公布号 |
US2015207500(A1) |
申请公布日期 |
2015.07.23 |
| 申请号 |
US201414539191 |
申请日期 |
2014.11.12 |
| 申请人 |
FUJITSU LIMITED |
发明人 |
Tsunoda Yukito |
| 分类号 |
H03K5/1252;H03K5/14 |
主分类号 |
H03K5/1252 |
| 代理机构 |
|
代理人 |
|
| 主权项 |
1. An emphasis signal generating circuit comprising:
a branch and delay unit configured to branch an input signal, delay a branched signal, and output a first delayed signal; a high-frequency extraction unit configured to extract at least one of high-frequency components of the input signal and the first delayed signal to output a high-frequency signal; and an addition and subtraction unit configured to add and subtract the input signal, the first delayed signal, and the high-frequency signal. |
| 地址 |
Kawasaki-shi JP |
