发明名称 Interconnect Structure And Method of Forming
摘要 An interconnect structure of an integrated circuit and a method for forming the same are provided. The interconnect structure includes a conductive line, and optionally, a cap layer over the conductive line. A treatment is performed to remove impurities prior to forming a layer, e.g., an etch stop layer, ILD, or the like, over the conductive line and/or the cap layer.
申请公布号 US2015206798(A1) 申请公布日期 2015.07.23
申请号 US201414158483 申请日期 2014.01.17
申请人 TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. 发明人 Chi Chih-Chien;Huang Huang-Yi;Tung Szu-Ping;Hsieh Ching-Hua
分类号 H01L21/768;H01L21/321;H01L23/532;H01L21/324 主分类号 H01L21/768
代理机构 代理人
主权项 1. A method for forming an interconnect structure, the method comprising: providing a workpiece, the workpiece having a first dielectric layer and a conductive feature formed in the first dielectric layer; treating the workpiece to remove impurities; and after the treating, forming a second dielectric layer over the conductive feature.
地址 Hsin-Chu TW
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