CHIP SELECT ('CS') MULTIPLICATION IN A SERIAL PERIPHERAL INTERFACE ('SPI') SYSTEM

摘要

Chip select (‘CS’) multiplication in an SPI system that includes an SPI master, a CS multiplier, a plurality of SPI slaves, and a fall time detection circuit, where the SPI master is coupled to the CS multiplier and the fall time detection circuit by a CS signal line, the CS multiplier includes a plurality of CS outputs with each CS output coupled to an SPI slave, and CS multiplication includes: receiving, from the SPI master, the CS signal on the CS signal line; detecting fall time of the CS signal; and, if the fall time of the CS signal is less than a predefined threshold, configuring, by the fall-time detection circuit, the CS multiplier to vary from providing a CS signal on a first CS output to providing a CS signal on a second CS output.

主权项

1. A method comprising:
monitoring, by a fall time detection circuit, a voltage of a chip select (‘CS’) signal on an CS signal line, the voltage alternating between a logic high voltage and a logic low voltage, including:
detecting a fall time of the CS signal; and configuring, by the fall-time detection circuit, a CS multiplier to provide a CS signal on one of a plurality of CS outputs in dependence upon the fall time of the CS signal.