| 发明名称 |
HYBRID APPROACH TO WRITE ASSIST FOR MEMORY ARRAY |
| 摘要 |
A hybrid write-assist memory system includes an array voltage supply and a static random access memory (SRAM) cell that is controlled by bit lines and a word line and employs a separable cell supply voltage coupled to the array voltage supply. Additionally, the hybrid write-assist memory system includes a supply voltage droop unit that is coupled to the SRAM cell and provides a voltage reduction of the separable cell supply voltage during a write operation. Also, the hybrid write-assist memory system includes a negative bit line unit that is coupled to the supply voltage droop unit and provides a negative bit line voltage concurrently with the voltage reduction of the separable cell supply voltage during the write operation. A method of operating a hybrid write-assist memory system is also provided. |
| 申请公布号 |
US2015206577(A1) |
申请公布日期 |
2015.07.23 |
| 申请号 |
US201414162639 |
申请日期 |
2014.01.23 |
| 申请人 |
Nvidia Corporation |
发明人 |
Gong Haiyan;Wang Lei;Li Sing-Rong;Lin Hwong-Kwo;Chang Pai-Yi |
| 分类号 |
G11C11/419;G11C5/14 |
主分类号 |
G11C11/419 |
| 代理机构 |
|
代理人 |
|
| 主权项 |
1. A hybrid write-assist memory system, comprising:
an array voltage supply; a static random access memory (SRAM) cell that is controlled by bit lines and a word line and employs a separable cell supply voltage coupled to the array voltage supply; a supply voltage droop unit that is coupled to the SRAM cell and provides a voltage reduction of the separable cell supply voltage during a write operation; and a negative bit line unit that is coupled to the supply voltage droop unit and provides a negative bit line voltage concurrently with the voltage reduction of the separable cell supply voltage during the write operation. |
| 地址 |
Santa Clara CA US |
