发明名称 |
Methods of Forming Memory Arrays and Semiconductor Constructions |
摘要 |
Some embodiments include methods of forming semiconductor constructions. A heavily-doped region is formed within a first semiconductor material, and a second semiconductor material is epitaxially grown over the first semiconductor material. The second semiconductor material is patterned to form circuit components, and the heavily-doped region is patterned to form spaced-apart buried lines electrically coupling pluralities of the circuit components to one another. At least some of the patterning of the heavily-doped region occurs simultaneously with at least some of the patterning of the second semiconductor material. |
申请公布号 |
US2015206886(A1) |
申请公布日期 |
2015.07.23 |
申请号 |
US201414569337 |
申请日期 |
2014.12.12 |
申请人 |
Micron Technology, Inc. |
发明人 |
Guha Jaydip;Surthi Shyam |
分类号 |
H01L27/108;H01L29/04;H01L21/324;H01L21/02;H01L21/265;H01L29/66;H01L29/16 |
主分类号 |
H01L27/108 |
代理机构 |
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代理人 |
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主权项 |
1. A method of forming a memory array, comprising:
providing a base comprising a first semiconductive material, the base having an memory array region and a peripheral region, an upper surface of the array region being recessed relative to uppermost surfaces of the base in the peripheral region; forming a heavily-doped region within the first semiconductor material in the array region; epitaxially growing a second semiconductor material over the first semiconductor material; the second semiconductor material being in situ doped during the epitaxial growth to form a stack of doped regions over the heavily-doped region; forming first trenches through the second semiconductor material; the first trenches extending along a first direction, and penetrating entirely through the heavily-doped region; forming second trenches through the second semiconductor material, the second trenches extending along a second direction which intersects the first direction, and not penetrating entirely through the heavily-doped region; the first and second trenches together patterning the second semiconductor material into a plurality of vertically-extending pillars comprising the stacked doped regions, and patterning the heavily-doped region into a plurality of buried lines under the pillars; the buried lines electrically interconnecting pluralities of the pillars to one another; and forming data storage devices over the vertically-extending pillars and electrically coupled with top doped regions of the stacked doped regions. |
地址 |
Boise ID US |