Extending processor MMU for shared address spaces

摘要

A system and a method are disclosed for more efficiently handling shared code stored in memory, comprising a modified memory management unit containing a new shared address space identifier register, and a modified TLB entry containing a new shared bit.

主权项

1. A method for accessing shared code on a system, wherein the system comprises a memory, a memory management unit (MMU) with a shared address space identifier (SASID) register, and a translation lookaside buffer (TLB) entry with a shared bit, the method comprising:
requesting a contents of a memory address in the memory, the request comprising a virtual address entry and an address space identifier (ASID) entry; responsive to the request, accessing the TLB entry, the TLB entry comprising the virtual address entry and a physical address entry; determining a state corresponding to a shared bit in the TLB entry; responsive to the state of the shared bit, accessing the contents of the SASID register; and responsive to a comparison of the contents of the SASID register and the ASID entry, accessing an address in the memory corresponding to the physical address entry the comparison of the contents of the SASID register and the ASID entry comprising:
accessing the contents of the SASID register; andaccessing a bit in the contents of the SASID register denoted by the value of the ASID entry.