发明名称 Electroless fill of trench in semiconductor structure
摘要 A trench in an inter-layer dielectric formed on a semiconductor substrate is defined by a bottom and sidewalls. A copper barrier lines the trench with a copper-growth-promoting liner over the barrier. The trench has bulk copper filling it, and includes voids in the copper. The copper with voids is removed, including from the sidewalls, leaving a void-free copper portion at the bottom. Immersion in an electroless copper bath promotes upward growth of copper on top of the void-free copper portion without inward sidewall copper growth, resulting in a void-free copper fill of the trench.
申请公布号 US9087881(B2) 申请公布日期 2015.07.21
申请号 US201313785934 申请日期 2013.03.05
申请人 GLOBALFOUNDRIES Inc. 发明人 Lin Sean X.;Zhang Xunyuan;He Ming;Zhao Larry;Iacoponi John;Tanwar Kunaljeet
分类号 H01L21/768;H01L23/48 主分类号 H01L21/768
代理机构 Heslin Rothenberg Farley & Mesiti P.C. 代理人 Reinke, Esq. Wayne F.;Heslin Rothenberg Farley & Mesiti P.C.
主权项 1. A method, comprising: providing a semiconductor structure comprising a copper-filled trench in a layer of an insulating material, wherein the trench is defined by a bottom and wails, and wherein the copper has one or more undesired voids therein; removing a portion of the copper from the trench, the portion including the one or more voids and comprising less than all of the copper in the trench; and electrolessly filling the trench from the bottom upward with additional copper while avoiding copper growth inward from the walls, wherein the electrolessly filling comprises placing the semiconductor structure into an electroless copper solution, and wherein the growing comprises copper from the solution growing on a remaining amount of copper after the removing.
地址 Grand Cayman KY