发明名称 Characterization and validation of processor links
摘要 A processor link that couples a first processor and a second processor is selected for validation and a plurality of communication parameter settings associated with the first and the second processors is identified. The first and the second processors are successively configured with each of the communication parameter settings. One or more test data pattern(s) are provided from the first processor to the second processor in accordance with the communication parameter setting. Performance measurements associated with the selected processor link and with the communication parameter setting are determined based, at least in part, on the test data pattern as received at the second processor. One of the communication parameter settings that is associated with the highest performance measurements is selected. The selected communication parameter setting is applied to the first and the second processors for subsequent communication between the first and the second processors via the processor link.
申请公布号 US9087135(B2) 申请公布日期 2015.07.21
申请号 US201414480238 申请日期 2014.09.08
申请人 International Business Machines Corporation 发明人 Berry, Jr. Robert W.;Haridass Anand;Jayaraman Prasanna
分类号 G01R31/28;G06F11/00;G06F11/30;G06F15/00;G06F9/30;G06F11/34;G06F11/22;G01R31/319 主分类号 G01R31/28
代理机构 DeLizio Law, PLLC 代理人 DeLizio Law, PLLC
主权项 1. A method comprising: selecting a first data lane of a plurality of data lanes of a first processor link that couples a first processor and a second processor, wherein said selecting comprises, providing a first data pattern from the first processor to the second processor via each of a plurality of data lanes of the first processor link,determining first performance measurements based on a received first data pattern at the second processor, andselecting the first data lane based on the first performance measurements associated with the each of the plurality of data lanes; and determining a plurality of second performance measurements associated with a parameter of the first processor and of the second processor by, configuring the parameter of the first processor and the second processor using one of a plurality of parameter values,for each of the plurality of parameter values, providing a second data pattern from the first processor to the second processor via remaining data lanes of the plurality of data lanes that do not include the first data lane and providing a random data pattern via the first data lane, anddetermining one of the plurality of second performance measurements for each of the plurality of parameter values based, at least in part, on a received second data pattern that is received at the second processor; and identifying a first parameter value of the plurality of parameter values that is associated with a highest of the plurality of second performance measurements, wherein the first parameter value is for configuring the first processor and the second processor for subsequent communication between the first processor and the second processor via the first processor link.
地址 Armonk NY US