High density memory cells using lateral epitaxy

摘要

In a vertical dynamic memory cell, monocrystalline semiconductor material of improved quality is provided for the channel of an access transistor by lateral epitaxial growth over an insulator material (which complements the capacitor dielectric in completely surrounding the storage node except at a contact connection structure, preferably of metal, from the access transistor to the storage node electrode) and etching away a region of the lateral epitaxial growth including a location where crystal lattice dislocations are most likely to occur; both of which features serve to reduce or avoid leakage of charge from the storage node. An isolation structure can be provided in the etched region such that space is provided for connections to various portions of a memory cell array.

主权项

1. A method of manufacture of a semiconductor device including a memory cell, said method including steps of
forming an opening in a semiconductor layer formed on a buried insulator, forming a storage node through said opening, depositing an insulator layer over said storage node to prevent crystal lattice dislocations propagating from the storage node, wherein a surface of said insulator layer is formed substantially coplanar with said buried insulator, forming a monocrystalline semiconductor layer by lateral epitaxial growth from edges of said semiconductor layer over said insulator layer, etching said monocrystalline semiconductor layer to remove any remaining crystal lattice dislocation resulting from said lateral epitaxial growth, forming an isolation structure in a volume created by said etching step, and forming a transistor structure on a remaining portion of said semiconductor layer and a planarized extension region of said semiconductor layer.