Systems and methods for high-speed, low-profile memory packages and pinout designs

摘要

Systems and methods are provided for stacked semiconductor memory packages. Each package can include an integrated circuit (“IC”) package substrate capable of transmitting data to memory dies stacked within the package over two channels. Each channel can be located on one side of the IC package substrate, and signals from each channel can be routed to the memory dies from their respective sides.

主权项

1. An integrated circuit (“IC”) package substrate, comprising a bottom surface comprising an array of contacts, the array of contacts comprising a plurality of data I/O contacts, wherein:
a first subset of the plurality of data I/O contacts forms a first loop-shaped layout arranged on a first side of the bottom surface; a second subset of the plurality of data I/O contacts forms a second loop-shaped layout arranged on a second side of the bottom surface; and the first side and the second side are reflectively symmetrical about a central axis, wherein the array of contacts further comprising a plurality of ground (“GND”) contacts, wherein only two GND contacts of the plurality of GND contacts are surrounded by the data I/O contacts of the first and second subsets of the plurality of data I/O contacts.