发明名称 Programmable peripheral interconnect
摘要 Peripherals (18, 20, 22, 24, 26) are connected to a processor (6) and a programmable peripheral interconnect (10) is connected to each peripheral. One of the peripherals (18) is configured to signal an event to the interconnect, and one of the peripherals (20) is configured to respond to a task signal from the interconnect by performing a task. The task-receiving peripheral (20) has a task register (40), addressable by the processor (6), and performs the task in response to a change in the contents of the register (40). The interconnect (10) accesses a memory (14) in which a mapping is stored between an event of a first peripheral (18) and a task of a second peripheral (20), the mapping comprising (i) an identification of the event, and (ii) the address of a task register (40). The mapping causes the interconnect (10) to provide a channel by sending a task signal to the second peripheral (20) in response to a signal of the event from the first peripheral (18).
申请公布号 US9087051(B2) 申请公布日期 2015.07.21
申请号 US201214351870 申请日期 2012.12.06
申请人 NORDIC SEMICONDUCTOR ASA 发明人 Elahi Junaid;Rusten Joar Olai;Olsen Lasse;Sundell Lars
分类号 G06F3/00;G06F13/28;G06F13/24;G06F13/38 主分类号 G06F3/00
代理机构 Koppel, Patrick, Heybl & Philpott 代理人 Koppel, Patrick, Heybl & Philpott
主权项 1. A peripheral communication system comprising: a processor; a plurality of peripherals, connected to the processor; and a programmable peripheral interconnect, connected to each peripheral, wherein: at least one of the peripherals is event-generating, being configured to signal an event to the programmable peripheral interconnect; at least one of the peripherals is task-receiving, being configured to respond to a task signal from the programmable peripheral interconnect by performing a task; said task-receiving peripheral comprises a task register, addressable by the processor, associated with the task, and is configured to perform the task in response to a change in the contents of the task register; the programmable peripheral interconnect is configured to access a memory in which a mapping can be stored between an event of a first peripheral and a task of a second peripheral, the mapping comprising (i) an identification of the event of the first peripheral, and (ii) an address of a task register associated with the task; and the programmable peripheral interconnect is configured so that, if a mapping is stored in memory between an event of a first peripheral and a task of a second peripheral, the interconnect will provide a channel by sending a task signal to the second peripheral in response to a signal of the event from the first peripheral.
地址 Trondheim NO