发明名称 Method and apparatus for selective DRAM precharge
摘要 Apparatus and method for using a precharge command in which a plurality of address lines are individually used to specify which banks of memory cells within a memory device have an open row that is to be closed.
申请公布号 US9087603(B2) 申请公布日期 2015.07.21
申请号 US200912369105 申请日期 2009.02.11
申请人 Intel Corporation 发明人 Osborne Randy B.
分类号 G11C8/00;G11C11/4094;G11C7/10;G11C8/18 主分类号 G11C8/00
代理机构 Blakely, Sokoloff, Taylor & Zafman LLP 代理人 Blakely, Sokoloff, Taylor & Zafman LLP
主权项 1. An apparatus comprising: a memory device having a plurality of banks, each bank comprised of: a plurality of memory cells organized into an array of rows and columns, wherein the memory device is capable of closing one or more open rows in one or more of the plurality of banks as individually specified in a precharge command, wherein the one or more open rows are closed to accommodate upcoming access commands; andcontrol logic coupled to the plurality of banks to control accesses made to each bank in response to commands received from an external device, wherein the commands include the precharge command in which address lines are individually used to specify the one or more of the plurality of banks having the one or more open rows that are to be closed.
地址 Santa Clara CA US