Method for suppression of spurs from a free running oscillator in frequency division duplex (FDD) and time division duplex (TDD) wireless systems

摘要

Embodiments of this disclosure include methods in which spurs generated by the drifting of an oscillation frequency of an oscillation signal provided by a free-running oscillator may be minimized and/or eliminated from an output signal of a phase locked loop (PLL). Methods include minimizing the mixing gain between the oscillation signal and a power signal provided to the PLL. The oscillation signal and the power signal may be mixed in a phase frequency detector (PFD) included in the PLL. The minimizing of the mixing gain for the PFD also minimizes the degrading effect that the spurs have on the overall performance of the communications device. The mixing gain may be minimized by minimizing the impedance provided at nodes included in the PFD where the oscillation signal and the power signal mix. The mixing gain may also be minimized by maximizing the power supply rejection ratio for the PFD.

主权项

1. A phase frequency detector (PFD), comprising:
a first differential circuit including a first transistor and a second transistor; and a second differential circuit including a third transistor and a fourth transistor, the third and the fourth transistors being coupled to the first transistor; and a third differential circuit including a fifth transistor and a sixth transistor, the fifth and the sixth transistors being coupled to the second transistor, wherein:
during a first phase, the first and the third transistors are arranged to form a first signal path, and wherein the first and the fourth transistors are arranged to form a second signal path matched to the first signal path, andduring a second phase, the fifth and the second transistors are arranged to form a third signal path, and wherein the sixth and the second transistors are arranged to form a fourth signal path matched to the third signal path.