发明名称 Q-gating cell architecture to satiate the launch-off-shift (LOS) testing and an algorithm to identify best Q-gating candidates
摘要 A method for creating an architecture to support Q-gating for launch-off-shift (LOS) scan testing using a plurality of flip-flops is provided. The method may include applying a common clock signal to each clock input of the plurality of flip-flops and applying a gated scan enable signal to each scan enable input of the plurality of flip-flops. The method may further include applying a global scan enable signal directly to each of a plurality of Q-gates corresponding to each of the plurality of flip-flops, wherein the global scan enable signal traverses a signal path that bypasses combinational logic located between any two flip-flops of the plurality of flip-flops.
申请公布号 US9086458(B2) 申请公布日期 2015.07.21
申请号 US201314011786 申请日期 2013.08.28
申请人 International Business Machines Corporation 发明人 GopalaKrishnaSetty Raghu G.;Kulshreshtha Kshitij;Upputuri Balaji
分类号 G01R31/28;G01R31/3185 主分类号 G01R31/28
代理机构 代理人 Feighan Patricia B.;Schnurmann Henri D.
主权项 1. A method for creating an architecture to support Q-gating for launch-off-shift (LOS) scan testing using a plurality of flip-flops, the method comprising: applying a common clock signal to each clock input of the plurality of flip-flops; applying a gated scan enable signal to each scan enable input of the plurality of flip-flops; and applying a global scan enable signal directly to each of a plurality of Q-gates corresponding to each of the plurality of flip-flops, wherein the global scan enable signal traverses a signal path that bypasses combinational logic located between any two flip-flops of the plurality of flip-flops.
地址 Armonk NY US