System and method to correlate errors to a specific downstream device in a PCIe switching network

摘要

A Peripheral Component Interconnect-Express (PCIe) port includes a PCIe link, a pending transaction counter, and an error status register. The PCIe port operates to issue a transaction on the PCIe link, determine that an endpoint device has become uncoupled from the PCIe link after issuing the first transaction, determine that a value stored in the pending transaction counter is not equal to zero in response to determining that the endpoint device has become uncoupled, and set an error bit in the error status register in response to determining that the first value is not equal to zero.

主权项

1. A Peripheral Component Interconnect-Express (PCIe) port comprising:
a PCIe link; a pending transaction counter; and an error status register; the PCIe port being operable to:
issue a first transaction on the PCIe link;determine that an endpoint device has become uncoupled from the PCIe link after issuing the first transaction;determine that a first value stored in the pending transaction counter is not equal to zero in response to determining that the endpoint device has become uncoupled;set a first error bit in the error status register in response to determining that the first value is not equal to zero;issue a second transaction on the PCIe link; anddecrement the pending transaction counter in response to receiving an acknowledgement from the endpoint device indicating that the endpoint device received the second transaction.