Apparatuses and methods for controlling a clock signal provided to a clock tree

摘要

Apparatuses, sense circuits, and methods for controlling a clock signal to a clock tree is described. An example apparatus includes a consecutive write command detection circuit configured to detect whether a next write command is received within a consecutive write command period of a current write command responsive to the current write command provided at an output of the write command register. The example apparatus further includes a clock signal control circuit coupled to the consecutive write command detection circuit and configured to control a clock signal to an input/output (I/O) latch based on whether the consecutive write command detection circuit detects that the next write command is within the consecutive write command period.

主权项

1. An apparatus comprising:
a consecutive write command detection circuit configured to detect whether a next write command is received within a consecutive write command period of a shifted current write command responsive to the shifted current write command provided at an output of a write command register; and a clock signal control circuit coupled to the consecutive write command detection circuit and configured to provide a disabled clock signal to an input/output (I/O) latch responsive to detection that the next write command is within the consecutive write command period by the consecutive write command detection circuit.