Cell test method and liquid crystal display panel for a tri-gate type pixel structure

摘要

A cell test method for a liquid crystal display panel includes the following steps. A waveform sequence to shorting bars is provided, wherein the waveform sequence includes that the first gate line sends a voltage of “turn on” signal and the second and third gate lines send a voltage of “turn off” signal at the first and second time periods; and the waveform sequence further comprises that the first and second data lines respectively send first and second voltages at the first and second time periods, the first threshold voltage is higher than the first voltage, the first voltage is higher than the common voltage, the common voltage is higher than the second voltage, and the second voltage is higher than the second threshold voltage, whereby pixels defined by the first gate line and the first and second data lines is turn on.

主权项

1. A cell test method for a liquid crystal display panel, the liquid crystal display panel including a plurality of first, second and third gate lines, a plurality of first and second data lines, a first gate line shorting bar, a second gate line shorting bar, a third gate line shorting bar, a first data line shorting bar and a second data line shorting bar, the first, second and third gate lines periodically disposed in order and electrically connected or electrically coupled to the first, second and third gate line shorting bars respectively, the first and second data lines periodically disposed in order and electrically connected or electrically coupled to the first and second data line shorting bars respectively, and the liquid crystal display panel having a common voltage, a first threshold voltage and a second threshold voltage, the cell test method comprising the following steps of:
providing a first waveform sequence to the first, second and third gate line shorting bars and the first and second data line shorting bars, wherein the first waveform sequence comprises the following steps of: sending a voltage of “turn-on” signal to the first gate lines, and sending a voltage of “turn-off” signal to the second and third gate lines at first time period and second time period; and sending a first voltage and a second voltage to the first and second data lines at the first and second time period respectively, wherein the first threshold voltage is higher than the first voltage, the first voltage is higher than the common voltage, the common voltage is higher than the second voltage, and the second voltage is higher than the second threshold voltage, whereby pixels defined by all of the first gate lines and the first and second data lines are turn on.