Data encoding using spare channels in a memory system

摘要

Implementations of encoding techniques are disclosed. The encoding technique, such as a Data bus Inversion (DBI) technique, is implementable in a vertically-stacked memory module, but is not limited thereto. The module can be a plurality of memory integrated circuits which are vertically stacked, and which communicate via a bus formed in one embodiment of channels comprising Through-Wafer Interconnects (TWIs), but again is not limited thereto. One such module includes spare channels that are normally used to reroute a data signal on the bus away from faulty data channels. In one disclosed technique, the status of a spare channel or channels is queried, and if one or more are unused, they can be used to carry a DBI bit, thus allowing at least a portion of the bus to be assessed in accordance with a DBI algorithm. Depending on the location and number of spare channels needed for rerouting, DBI can be apportioned across the bus in various manners. Implementations can also be used with other encoding techniques not comprising DBI.

主权项

1. An integrated circuit, comprising:
a plurality of original data signals internal to the circuit; a data bus inversion (DBI) codec, the DBI codec having first I/Os coupled to the plurality of original data signals, and second I/Os including a DBI I/O; a switching network coupled to the second I/Os and coupleable to a plurality of channels external to the circuit, wherein the plurality of channels comprises a plurality of data channels and a spare channel; rerouting circuitry for controlling the switching network to reroute an original data signal to the spare channel in the event that one of the data channels is faulty; and DBI control circuitry, wherein if the spare channel is not being used for rerouting, the DBI control circuitry enables the DBI codec and instructs the switching network to couple the DBI I/O to the spare channel.