发明名称 DISPLAY CIRCUITRY WITH REDUCED METAL ROUTING RESISTANCE
摘要 A display includes a color filter layer and a thin film transistor layer. A layer of a liquid crystal material can be located between the color filter layer and the thin film transistor (TFT) layer. The TFT layer includes thin film transistors formed on an upper part of a glass substrate. A passivation layer is formed on the thin film transistor layers. An oxide liner is formed on the passivation layer. A first dielectric layer with low dielectric constant is formed on the oxide liner. A second dielectric layer with low dielectric constant is formed on the first dielectric layer with low dielectric constant. A common voltage electrode and a relating storage capacitance are formed on the second dielectric layer with low dielectric constant. Thin film transistor gate structures are formed on the passivation layer. Conductive routing structures are formed on the oxide liner, on the first dielectric layer with low dielectric constant, and on the second dielectric layer with low dielectric constant. The use of routing structures on the oxide liner reduces total routing resistance, and enables interlaced metal routing, thereby helping reducing an inactive boundary area outside active display areas.
申请公布号 KR20150083043(A) 申请公布日期 2015.07.16
申请号 KR20150002490 申请日期 2015.01.08
申请人 APPLE INC. 发明人 CHEN YU CHENG;CHANG SHIH CHANG;OSAWA HIROSHI;CHANG TING KUO
分类号 G02F1/136;G02F1/1362;G02F1/1368 主分类号 G02F1/136
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