发明名称 PLANARIZATION SCHEME FOR FINFET GATE HEIGHT UNIFORMITY CONTROL
摘要 Embodiments of the present invention provide improved methods for fabrication of finFETs. During finFET fabrication, a film, such as amorphous silicon, is deposited on a semiconductor substrate which has regions with fins and regions without fins. A fill layer is deposited on the film and planarized to form a flush surface. A recess or etch process is used to form a planar surface with all portions of the fill layer removed. A finishing process such as a gas cluster ion beam process may be used to further smooth the substrate surface. This results in a film having a very uniform thickness across the structure (e.g. a semiconductor wafer), resulting in improved within-wafer (WiW) uniformity and improved within-chip (WiC) uniformity.
申请公布号 US2015200111(A1) 申请公布日期 2015.07.16
申请号 US201414153120 申请日期 2014.01.13
申请人 GLOBALFOUNDRIES Inc. 发明人 Muralidharan Sruthi;Hu Zhenyu;Zhang Qi;Han Ja-Hyung;Koli Dinesh;Chen Zhuangfei
分类号 H01L21/321;H01L21/02;H01L21/265 主分类号 H01L21/321
代理机构 代理人
主权项 1. A method of forming a semiconductor structure, comprising: depositing a film on a semiconductor substrate, wherein the semiconductor substrate comprises a plurality of fins formed thereon; depositing a fill layer on the film; planarizing the fill layer to be flush with the film; and performing an etch on the semiconductor structure.
地址 Grand Cayman KY