| 主权项 |
1. An apparatus comprising:
a first shifting unit right shifting a first digital input signal by a first shifting amount to provide a first shifted signal, wherein the first digital input signal is of a fixed width data type having a fixed length of x bit integers and wherein the first shifted signal is of the fixed width data type having the fixed length of x bit integers; a second shifting unit right shifting a second digital input signal by the first shifting amount to provide a second shifted signal, wherein the second digital input signal is of the fixed width data type having the fixed length of x bit integers and wherein the second shifted signal is of the fixed width data type having the fixed length of x bit integers; a combiner combining the first shifted signal and the second shifted signal to provide a combined signal, wherein the combiner is combining the first scaled signal and the second scaled signal at a fixed length of y bit integers and wherein the combined signal outputted from the combiner is of the fixed width data type having the fixed length of x bit integers; a soft limiter soft limiting the combined signal by reducing some of the amplitudes of the combined signal to provide a soft limited signal, wherein the soft limiter is soft limiting the combined signal at the fixed length of x bit integers; and a third shifting unit left shifting the soft limited signal to provide an output signal, wherein the output signal is of the fixed width data type having the fixed length of x bit integers, wherein each of the first digital input signal and the second digital input signal is right shifted by a value greater than or equal to 1, wherein the combined signal is left shifted by a value greater than or equal to 1, and wherein the value of y is greater than the value of x. |
