发明名称 MEMORY SYSTEM CAPABLE OF RE-MAPPING ADDRESS
摘要 A memory system includes a memory controller, a memory cell array, a location information storage unit, an address mapping table, an address conversion unit, and a mapping information calculation unit. The memory controller generates a logical address signal and an address re-mapping command. The memory cell array includes a plurality of logic blocks. The location information storage unit stores location information corresponding to faulty memory cells included in the memory cell array. The address mapping table stores address mapping information. The address conversion unit converts the logical address signal to a physical address signal corresponding to the memory cell array based on the address mapping information. The mapping information calculation unit generates the address mapping information to reduce the number of logic blocks including the faulty memory cells based on the location information upon the mapping information calculation unit receiving the address re-mapping command.
申请公布号 US2015199230(A1) 申请公布日期 2015.07.16
申请号 US201414524476 申请日期 2014.10.27
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 PARK MI-KYOUNG;Lee Dong-Yang;Lim Sun-Young;Jung Bu-Il;Jung Ju-Yun;Cho Sung-Ho;Choi Hee-Joo;Choo Min-Yeab;Han Hyuk
分类号 G06F11/10 主分类号 G06F11/10
代理机构 代理人
主权项 1. A memory system, comprising: a memory controller configured to generate a logical address signal and an address re-mapping command; a first memory cell array comprising a plurality of first logic blocks; a first location information storage unit configured to store first location information corresponding to first faulty memory cells included in the first memory cell array; a first address mapping table configured to store first address mapping information; a first address conversion unit configured to convert the logical address signal to a first physical address signal corresponding to the first memory cell array based on the first address mapping information; and a first mapping information calculation unit configured to generate the first address mapping information to reduce a number of logic blocks including the first faulty memory cells in the first memory cell array based on the first location information upon the first mapping information calculation unit receiving the address re-mapping command.
地址 Suwon-si KR