发明名称 メモリデバイスおよびメモリデバイスのための構成方法
摘要 <p>A memory device has a plurality of individually erasable blocks of memory cells and a controller configured to configure a first block of memory cells in a first configuration comprising one or more groups of overhead data memory cells, and to configure a second block of memory cells in a second configuration comprising one or more groups of user data memory cells and at least one group of overhead data memory cells. The first configuration is different than the second configuration. At least one group of overhead data memory cells of the second block of memory cells comprises a different storage capacity than at least one group of overhead data memory cells of the first block of memory cells.</p>
申请公布号 JP5749860(B2) 申请公布日期 2015.07.15
申请号 JP20140525049 申请日期 2012.07.31
申请人 发明人
分类号 G11C16/06;G06F12/16;G11C16/02;G11C16/04;G11C29/42 主分类号 G11C16/06
代理机构 代理人
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