Logic circuit

摘要

An object is to apply a transistor using an oxide semiconductor to a logic circuit including an enhancement transistor. The logic circuit includes a depletion transistor 101 and an enhancement transistor 102. The transistors 101 and 102 each include a gate electrode, a gate insulating layer, a first oxide semiconductor layer, a second oxide semiconductor layer, a source electrode, and a drain electrode. The transistor 102 includes a reduction prevention layer provided over a region in the first oxide semiconductor layer between the source electrode and the drain electrode.

主权项

1. A semiconductor device comprising:
a logic circuit comprising: a first transistor comprising a first gate electrode, a first electrode, and a second electrode; a second transistor comprising a second gate electrode, the second electrode of the first transistor, and a third electrode; a first terminal electrically connected to the second gate electrode; and a second terminal electrically connected to a portion where the second transistor is connected to the first transistor, wherein a high power supply voltage terminal is electrically connected to the first electrode; wherein a low power supply voltage terminal is electrically connected to the third electrode, wherein the first transistor comprises:
the first gate electrode;a gate insulating layer over the first gate electrode;a first oxide semiconductor layer over the gate insulating layer;the first electrode which is electrically connected to the first oxide semiconductor layer; andthe second electrode which is electrically connected to the first oxide semiconductor layer, wherein the second transistor comprises:
the second gate electrode;the gate insulating layer over the second gate electrode;a second oxide semiconductor layer over the gate insulating layer;the second electrode which is electrically connected to the second oxide semiconductor layer; andthe third electrode which is electrically connected to the second oxide semiconductor layer, wherein a layer comprising oxygen and silicon is on the second oxide semiconductor layer, wherein a region of the second oxide semiconductor layer in contact with the layer has a smaller thickness than a region of the second oxide semiconductor layer in contact with the second electrode and a region of the second oxide semiconductor layer in contact with the third electrode, and wherein a resistance of the second oxide semiconductor layer is lower than a resistance of the first oxide semiconductor layer.