发明名称 |
Semiconductor device having multi-layered bit line contact |
摘要 |
A method for forming a semiconductor device is disclosed. A method for forming a semiconductor device includes forming a first bit line contact over a semiconductor substrate, forming a second bit line contact that is coupled to the first bit line contact and has a larger width than the first bit line contact, and forming a bit line over the second bit line contact. When using the semiconductor device having a buried gate, although the bit line is formed to have a small width and the bit line pattern is misaligned, the method prevents incorrect coupling between a bit line and a bit line contact, so that it basically deteriorates unique characteristics of the semiconductor device. |
申请公布号 |
US9082755(B2) |
申请公布日期 |
2015.07.14 |
申请号 |
US201314019318 |
申请日期 |
2013.09.05 |
申请人 |
SK HYNIX INC. |
发明人 |
Kim Hyun Jung |
分类号 |
H01L29/417;H01L23/48;H01L27/108;H01L21/768 |
主分类号 |
H01L29/417 |
代理机构 |
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代理人 |
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主权项 |
1. A semiconductor device comprising:
a substrate; a bit line contact pattern disposed over the substrate, the bit line contact pattern having a stack structure of a first bit line contact and a second bit line contact, the second bit line contact being disposed over the first bit line contact; and a bit line disposed over the bit line contact pattern and electrically coupled to the bit line contact pattern; a first spacer disposed at a sidewall of the first bit line contact; and a second spacer disposed at a sidewall of the bit line and an outer sidewall of the second bit line contact, wherein the first bit line contact has a first width and the second bit line contact has a second width, the second width being larger than the first width, and wherein each of the first spacer and the second spacer includes an insulation film. |
地址 |
Icheon KR |