| 发明名称 | Clock signal timing-based noise suppression | ||
| 摘要 | A method includes generating one of a first clock signal and a second clock signal from the other clock signal. The first clock signal is configured to be used to synchronize an operation of an analog system, and the second clock signal is configured to be used to synchronize an operation of a digital system. The method includes using a phase detector of the analog system to measure a timing of the first clock signal relative to the second clock signal; and the method includes controlling a delay element of the digital system to regulate the timing based on the measurement by the phase detector to suppress noise in the analog system. | ||
| 申请公布号 | US9083354(B2) | 申请公布日期 | 2015.07.14 |
| 申请号 | US201313832708 | 申请日期 | 2013.03.15 |
| 申请人 | SILICON LABORATORIES INC. | 发明人 | Islam Imranul;Thomsen Axel;Zavalney Paul I. |
| 分类号 | H03L7/06;H03L7/081 | 主分类号 | H03L7/06 |
| 代理机构 | Trop, Pruner & Hu, P.C. | 代理人 | Trop, Pruner & Hu, P.C. |
| 主权项 | 1. A method comprising: generating one of a first clock signal and a second clock signal from the other clock signal, the first clock signal being configured to be used to synchronize an operation of an analog system and the second clock signal being configured to be used to synchronize an operation of a digital system; and using a phase detector of the analog system to measure a timing of the first clock signal relative to the second clock signal, wherein the generating comprises controlling a delay element of the digital system to regulate the timing based on the measurement of the timing by the phase detector to suppress noise in the analog system. | ||
| 地址 | Austin TX US | ||