发明名称 Memory module for high-speed operations
摘要 A memory module includes a plurality of buses. A plurality of memory chips is mounted on a module board and is connected to a first node, a second node, and a plurality of third nodes of the plurality of buses. The first node, the second node, and the third nodes branch off to a first memory chip, a second memory chip, and the third memory chips, respectively. A length of the plurality of buses between the first and second nodes is longer than a length of the plurality of buses between adjacent nodes from among the second node and the third nodes.
申请公布号 US9082464(B2) 申请公布日期 2015.07.14
申请号 US201313766933 申请日期 2013.02.14
申请人 Samsung Electronics Co., Ltd. 发明人 Sung Myung-Hee;Ko Chang-Woo;Lee Jea-Eun;Lee Young-Ho
分类号 G11C5/06;G11C5/04;G11C7/02;G11C7/10;G11C7/22;G11C11/4076;G11C11/4093 主分类号 G11C5/06
代理机构 F. Chau & Associates, LLC 代理人 F. Chau & Associates, LLC
主权项 1. A memory module comprising: a plurality of buses; a plurality of memory chips mounted on a module board, and connected to a first node, a second node, and a plurality of third nodes of the plurality of buses, respectively; and a buffer chip mounted on the module board, wherein the first node, the second node, and the third nodes branch off to a first memory chip, a second memory chip, and a plurality of third memory chips, respectively, wherein a length of the bus between the first node of the first memory chip, and the second nodes of the second memory chip is longer than a length of any other buses of the plurality of buses, and wherein the first memory chip of the plurality of memory chips is closer to the buffer chip than any of the other memory chips of the plurality of memory chips.
地址 Suwon-si, Gyeonggi-do KR