发明名称 |
Semiconductor devices and power conversion systems |
摘要 |
A semiconductor device includes first semiconductor layer of a first conductivity type; a second semiconductor layer of a second conductivity type that is formed near a surface of the first semiconductor layer; a first main electrode that is electrically connected to the second semiconductor layer; a third semiconductor layer of the second conductivity type that neighbors the first semiconductor layer; a fourth semiconductor layer of the first conductivity type that is selectively disposed in an upper portion of the third semiconductor layer; a second main electrode that is electrically connected to the third semiconductor layer and the fourth semiconductor layer; a trench whose side face is in contact with the third semiconductor layer and the fourth semiconductor layer; a gate electrode that is formed along the side face of the trench by a sidewall of polysilicon; and a polysilicon electrode. |
申请公布号 |
US9082814(B2) |
申请公布日期 |
2015.07.14 |
申请号 |
US201213348021 |
申请日期 |
2012.01.11 |
申请人 |
Hitachi Power Semiconductor Device, Ltd. |
发明人 |
Shiraishi Masaki;Mori Mutsuhiro;Suzuki Hiroshi;Watanabe So |
分类号 |
H01L29/40;H01L29/423;H01L29/66;H01L29/739;H01L29/06;H01L29/10 |
主分类号 |
H01L29/40 |
代理机构 |
Crowell & Moring LLP |
代理人 |
Crowell & Moring LLP |
主权项 |
1. A semiconductor device, comprising:
a first semiconductor layer of a first conductivity type; a second semiconductor layer of a second conductivity type that is formed near a surface of the first semiconductor layer; a first main electrode that is electrically connected to the second semiconductor layer; a third semiconductor layer of the second conductivity type that neighbors the first semiconductor layer and is formed near a surface of the first semiconductor layer opposite to the second semiconductor layer; a fourth semiconductor layer of the first conductivity type that is selectively disposed in an upper portion of the third semiconductor layer; a second main electrode that is electrically connected to the third semiconductor layer and the fourth semiconductor layer; a trench whose side face is in contact with the third semiconductor layer and the fourth semiconductor layer, while reaching the first semiconductor layer; a gate electrode that is formed by a sidewall of polysilicon along the side face of the trench; and a polysilicon electrode that is disposed away from the gate electrode within the trench and electrically connected to the second main electrode. |
地址 |
Hitachi-shi JP |