发明名称 Method of making a semiconductor device including an all around gate
摘要 A method of making a semiconductor device includes forming an intermediate structure including second semiconductor fin portions above a first semiconductor layer, and top first semiconductor fin portions extending from respective ones of the second semiconductor fin portions. The second semiconductor fin portions are selectively etchable with respect to the top first semiconductor fin portions. A dummy gate is on the intermediate structure. The second semiconductor fin portions are selectively etched to define bottom openings under respective ones of the top first semiconductor fin portions. The bottom openings are filled with a dielectric material.
申请公布号 US9082788(B2) 申请公布日期 2015.07.14
申请号 US201313906702 申请日期 2013.05.31
申请人 STMICROELECTRONICS, INC.;INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 Loubet Nicolas;Khare Prasanna;Bu Huiming
分类号 H01L21/8238;H01L29/66;H01L21/8234;H01L27/12;H01L29/78 主分类号 H01L21/8238
代理机构 Allen, Dyer, Doppelt, Milbrath & Gilchrist, P.A. 代理人 Allen, Dyer, Doppelt, Milbrath & Gilchrist, P.A.
主权项 1. A method of making a semiconductor device comprising: forming an intermediate structure comprising an intermediate dielectric layer on a first semiconductor layer,a plurality of bottom first semiconductor fin portions above the first semiconductor layer and within the intermediate dielectric layer,a plurality of second semiconductor fin portions above the first semiconductor layer and extending from respective ones of the plurality of bottom first semiconductor fin portions, with a bottom surface of each second semiconductor fin being recessed within the intermediate dielectric layer,a plurality of top first semiconductor fin portions extending from respective ones of the plurality of second semiconductor fin portions,the plurality of second semiconductor fin portions being selectively etchable with respect to the plurality of top first semiconductor fin portions, anda dummy gate on the plurality of top first semiconductor fin portions and the intermediate dielectric layer;selectively etching the plurality of second semiconductor fin portions to define a plurality of bottom openings under respective ones of the plurality of top first semiconductor fin portions; andfilling the plurality of bottom openings with a dielectric material.
地址 Coppell TX US